Products > TCP/IP Session Processor LE2020™ Download page 1 Download page 2 TCP/IP Session Processor LE2020 Product Brief LeWiz's TCP/IP Session Processor LE2020™ (TSP LE2020) chip is designed to off-load TCP/IP processing from the host processor(s). It solves bottlenecks in high-performance networked systems such as servers, storage, and networked appliances. This alleviates the main processor from performing the TCP/IP tasks in software and makes available the CPU performance for running applications. It interfaces directly to the network interface devices such as MACs and supports multipe Gigabit Ethernet ports. The TSP LE2020™ accelerates the processing of the TCP/IP functions in hardware. It accelerates the TCP/IP processing at lightning speed thus reduces network It accelerates the TCP/IP processing at lighting speed thus reduces network latency and overhead in network attached systems. The TSP LE2020™ chip works as extension of the host CPU. It maintains the programmability, configurability, and flexibility via the host interface. It also supports fail-over protection/alernate pathing and load balancing/trunking capabilities required in high-performance server and storage systems. Using LeWiz's advanced layer-processing architecture, the TCP/IP Session Processor LE2020™ offers the highest performance, lowest power and most cost effective way of addressing the root problems found in many IP network attached equipment. Lowers overall network cost Enhances systems' performance and extending their life Increases number of users per system Optimize the network efficiency - achieve wire speed, full duplex Eliminates system performance constraints Enhances system security Lowers power/cooling requirements Improves system reliabilty Performs TCP/IP functions in hardware rather than firmware or other methods for lowest latency and overhead Line rate performance at multi Gigabit speeds scaleable to 10Gbps Multi-ports and capable of maintaining millions of concurrent TCP sessions Requires minimal host CPU performance while utilizing minimum power with no heat sink Includes security protection features such as selective filtering Supports zero buffer copy mode Full TCP/IP Session termination for maximum host CPU off-load Supports RDMA Full debug/diagnostic capabiliy Handle MACs directly without CPU intervention On chip DMA engine for high speed data movement and throughput Contains a 64-bit PCI bridge on chip for interfacing to the host’s system bus Interfaces directly to many popular Gigabit MACs Interfaces directly with external CPU (optional) Compatible with off-the-shelf host bridge chips for optimum system performance Fits in standard system buses – a drop-in for many systems Supports Linux, Solaris, and Windows Product Specifications Figure 1: TCP/IP Session Processor LE2020 Block Diagram Featured Functions: Complies with PCI 2.2 standard 64 bit, 66/33MHz, 3.3V PCI bus interface Low cost, low power external SDRAMs Concurrent operation on primary and secondary bus interfaces Concurrent transmit and recieve operations Buffers optimized for fast packet & stream transfers On-chip phase lock loops for low external clock skew Full software support with device drivers, utilities and reference design TCP/IP features include: Reassembly of incoming data Segmentation of outgoing data Sequence ordering - handling out of order segments Overlap elimination - handling duplicate segments Re-transmission, Flow control, etc. TCP timer handling Connection set up and tear down Hardware checksum processing Window scaling, updating, and sizing Figure 2: Dual Gigabit Network Interface Card with LE2020 TCP/IP off-load processing back to top